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How to convert VHDL code to Mixed Mode Generator
View Video
Open
System → VHDL Editor
from
EDWinXP-Main
Select
Build → Compile, then select Build → Create MM Model
to create the mixed model.
Select
Library → Library Browser
Select
MMMGEN.PART
from
Parts
and select the project →
Edit Part
.
Select
File → Save Part As
to save the project.
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