Arizona Autorouter

Q1.I am trying to figure out how to pour copper into areas that I don't want the router to use.

Q2. Is there a way to define the width of traces in power and signal nets?

Q3.Is it possible to specify all traces to be routed to components, through the solder side only?

Q4.In some complex circuits, the traces are missing when AutoRoute is given? Why are they missing and how do you overcome it?

Q5.In the Layout Editor, after using the autorouter, I routed manually some orthogonal traces. But when I want to use the autorouter again my last traces don't appear. What is the solution for this?

Q6.How to convert 16-bit strategy files to 32-bit strategy files?

Q7.When I start my autorouter and I try to load the Edwin file into it I get next error code: Error code= 409, Error func= 403, error padstack. What does this mean and how can I solve the problem so that I can run the autorouter?

Q8.From the Layout module, when I go to route->Autoroute and pick Arizona, the Layout module minimizes, but the autorouter doesn't appear. How do I fix the problem?

Q9.To route traces in Arizona Autorouter between two TQFP packages. I could route between SOIC and DIP packages but that seems impossible with TQFP parts? Give a solution?

Q1: I am trying to figure out how to pour copper into areas that I don't want the router to use.
Create copper area from the Layout Editor (Tools/ Copper/ Create Copper Graphic item). Select the option tool accordingly. If no net is to be assigned to the created copper area, select option tool F7 (No net). Now invoke Arizona autorouter. Select File/ Load Options/ Include Copper planes before loading the project. Now if you start autorouting, those areas where copper was created will be left unused by the router. These blocks placed will not generate any HRF pad.

Q2: Is there a way to define the width of traces in power and signal nets?
To define the width of traces in power and signal nets, proceed in the following way:
Select the option tool ‘Routing nets Parameters’ from the function tool ‘Parameters Setup’. A window ‘
Net Parameters’ pops up. The Width and Via set as default for Power and Signal lines are displayed. Define the required value and click ACCEPT. After autorouting, when you export back to EDWin, your traces will be routed with the defined trace widths.

Q3: Is it possible to specify all traces to be routed to components, through the solder side only?

At the time of autorouting specify the layer(s) on which routing should be done. There are options for specifying these layers in the Arizona autorouter.
Select the tool ’Select Layers and Directions’ from the toolbar. A window, ‘Settings' pops up. By default the setting will be as follows: -
Component Layer - Horizontal direction (both power and signal lines)
Solder Layer - Vertical direction (both power and signal lines)
To restrict trace routing on the component layer click on the column 'Direction' of the component layer. The direction gets changed to Vertical. By double clicking once again the layer gets unselected. Disable all other layers. Now, the only layer selected for routing will be the solder layer. Perform autorouting with this setting.
Now, if there are unrouted pairs, you may have another iteration of the routing process with the direction for the solder layer changed to Horizontal. In order to get the best results adjust the routing parameters to suit to single layer routing. Obviously, in the case of very complex boards, single layer routing may result in unrouted pairs.

Q4: In some complex circuits, the traces are missing when AutoRoute is given? Why are they missing and how do you overcome it?

In complex circuits, it may happen that autorouter is unable to route all the traces with the set strategies and parameters. In such cases, you will have to manually route the remaining traces or else change the parameter settings such as decrease the wrong layer cost thus giving the AutoRouter more flexibility of routing. Once you have prerouted your board, with orthogonal traces, you can prevent rerouting by Autorouter by selecting load Load Options/ Fix prerouted traces from the File menu.

Tips
In Autorouter, set the layers before routing. On each layer two ways of routing may be done i.e. horizontal and vertical. You may pour copper to prevent autorouter from routing.
OR
The other way is to give directly for Autorouting after setting the layers, then view the list of unrouted pairs and route these pairs manually.

Q5: In the Layout Editor, after using the autorouter, I routed manually some orthogonal traces. But when I want to use the autorouter again my last traces don't appear. What is the solution for this?

Autorouter loads only traces which starts and ends on pads. Any manually routed hanging traces and traces, which end on other traces, will not be loaded by autorouter. So please take care to route only traces from pad to pad if you are routing some traces manually before invoking autorouter.

Q6: How to convert 16-bit strategy files to 32-bit strategy files?

You cannot use 16bit strategy file to 32bit by simply renaming the .bs to .rsf. This doesn't make the conversion of strategy file. Either you have to convert this strategy through the database conversion using Conversion manager or you have to generate a similar strategy file in EDWin and save it to .rsf file. In the first case the strategy file get converted along with the database and thus you will get it in the Arizona Strategy window. Here you can save the file by clicking "SAVE" button and it gets saved to .rsf extension file.

Q7: When I start my autorouter and I try to load the Edwin file into it I get next error code: Error code= 409, Error func= 403, error padstack. What does this mean and how can I solve the problem so that I can run the autorouter?

This error indicates that there may be some problem with the padstack. Either it may be created incorrectly or you might have placed it in the wrong way. Please check all the padstack in that particular project.

I try autorouting the layout design using Arizona and a blank board is displayed. I also tried to load the file from EDWin but get the following message: "ErrorCode = 404 ErrorFunk =300 Merge nets in the board? What must I do to comply with this message and prevent the same situation again?

The problem is due to the multiple assignment of a single pin to the nodes for some parts. Arizona is pointing out this error while loading. To figure out the Part, which has multiple assignment of pins, take Library editor. In the table that shows the pin assignment, find the pin that is assigned to two nodes. Follow the same procedure and check for all the parts that are used for the project.

Immediate Solution:

Delete one of the assignments for the pin.

When you invoke Arizona from layout it just loads the Screen with that layout, actually the project is not loaded in this condition. In this case, Arizona routes blank traces on the board. Select "File->Load board to Route from project” to actually load the database.

Q8: From the Layout module, when I go to route->Autoroute and pick Arizona, the Layout module minimizes, but the autorouter doesn't appear. How do I fix the problem?

This is because of missing sys path in your shortcut created on the desktop. Please set it as ": \EDWinXP\EDWinXP.exe" ": \EDWinXP\Sys"

Q9: To route traces in Arizona Autorouter between two TQFP packages. I could route between SOIC and DIP packages but that seems impossible with TQFP parts? Give a solution?

You can use different strategies for better autorouting. Arizona -> Strategy -> click on load button -> SMD.RSF, select SMD then click on RUN button. Now you will be getting better routing. You can also create your own strategies. For more details please refer help files.